sample1 Project Status
Project File: | usb.xise | Parser Errors: | No Errors
Module Name: | sample1 | Implementation State: | Programming File Generated
Target Device: | xc3s400-4pq208 |

- Errors:

No Errors
Product Version: | ISE 13.2 |

- Warnings:

32 Warnings (5 new)
Design Goal: | Balanced |

- Routing Results:

All Signals Completely Routed
Design Strategy: | Xilinx Default (unlocked) |

- Timing Constraints:

All Constraints Met
Environment: | System Settings |

- Final Timing Score:

0 (Timing Report)

Device Utilization Summary | [-]
Logic Utilization | Used | Available | Utilization | Note(s)
Total Number Slice Registers | 414 | 7,168 | 5% |
Number used as Flip Flops | 413 |  |  |
Number used as Latches | 1 |  |  |
Number of 4 input LUTs | 360 | 7,168 | 5% |
Number of occupied Slices | 380 | 3,584 | 10% |
Number of Slices containing only related logic | 380 | 380 | 100% |
Number of Slices containing unrelated logic | 0 | 380 | 0% |
Total Number of 4 input LUTs | 409 | 7,168 | 5% |
Number used as logic | 211 |  |  |
Number used as a route-thru | 49 |  |  |
Number used as Shift registers | 149 |  |  |
Number of bonded IOBs | 34 | 141 | 24% |
IOB Flip Flops | 19 |  |  |
Number of RAMB16s | 2 | 16 | 12% |
Number of BUFGMUXs | 3 | 8 | 37% |
Number of DCMs | 1 | 4 | 25% |
Number of BSCANs | 1 | 1 | 100% |
Number of RPM macros | 13 |  |  |
Average Fanout of Non-Clock Nets | 2.87 |  |  |

Performance Summary | [-]
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report
Timing Constraints: | All Constraints Met |  |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report | Current | Sun Dec 22 16:29:52 2013 | 0 | 16 Warnings (5 new) | 73 Infos (5 new)
Translation Report | Current | Sun Dec 22 16:29:57 2013 | 0 | 0 | 1 Info (0 new)
Map Report | Current | Sun Dec 22 16:30:00 2013 | 0 | 10 Warnings (0 new) | 4 Infos (0 new)
Place and Route Report | Current | Sun Dec 22 16:30:08 2013 | 0 | 4 Warnings (0 new) | 2 Infos (1 new)
Power Report |  |  |  |  |
Post-PAR Static Timing Report | Current | Sun Dec 22 16:30:10 2013 | 0 | 0 | 4 Infos (0 new)
Bitgen Report | Current | Sun Dec 22 16:30:15 2013 | 0 | 2 Warnings (0 new) | 1 Info (0 new)

Secondary Reports | [-]
Report Name | Status | Generated
WebTalk Report | Current | Sun Dec 22 16:30:15 2013
WebTalk Log File | Current | Sun Dec 22 16:30:38 2013

Date Generated: 12/23/2013 - 17:02:04