### Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.

Software Version and Target Device
Product Version: | ISE:13.2 (WebPack) - O.61xd | Target Family: | Spartan3
OS Platform: | NT | Target Device: | xc3s400
Project ID (random number) | 5d3eaae5a8334fc7b4cc449837d1b975.020032D93A0F4E839004C8FBD211019E.10 | Target Package: | pq208
Registration ID | __0_0_0 | Target Speed: | -4
Date Generated | 2017-01-22T20:04:17 | Tool Flow | ISE

User Environment
OS Name | Microsoft Windows 7 , 32-bit | OS Release | Service Pack 1 (build 7601)
CPU Name | Pentium(R) Dual-Core CPU E5700 @ 3.00GHz | CPU Speed | 3000 MHz

Device Usage Statistics
Macro Statistics | Miscellaneous Statistics | Net Statistics | Site Usage
Comparators=15

- 11-bit comparator greatequal=4
- 11-bit comparator less=11

Counters=2

- 11-bit up counter=2

Registers=7

- Flip-Flops=7

MiscellaneousStatistics

- AGG_BONDED_IO=7
- AGG_IO=7
- AGG_SLICE=59
- NUM_4_INPUT_LUT=112
- NUM_BONDED_IOB=7
- NUM_BUFGMUX=1
- NUM_CYMUX=49
- NUM_LUT_RT=8
- NUM_SLICEL=59
- NUM_SLICE_FF=29
- NUM_XOR=22

NetStatistics

- NumNets_Active=120
- NumNets_Vcc=1
- NumNodesOfType_Active_CLKPIN=19
- NumNodesOfType_Active_CNTRLPIN=22
- NumNodesOfType_Active_DOUBLE=207
- NumNodesOfType_Active_DUMMY=320
- NumNodesOfType_Active_DUMMYESC=2
- NumNodesOfType_Active_GLOBAL=12
- NumNodesOfType_Active_HUNIHEX=7
- NumNodesOfType_Active_INPUT=349
- NumNodesOfType_Active_IOBOUTPUT=2
- NumNodesOfType_Active_OMUX=107
- NumNodesOfType_Active_OUTPUT=114
- NumNodesOfType_Active_PREBXBY=3
- NumNodesOfType_Active_VFULLHEX=5
- NumNodesOfType_Active_VLONG=1
- NumNodesOfType_Active_VUNIHEX=8
- NumNodesOfType_Vcc_CNTRLPIN=1
- NumNodesOfType_Vcc_INPUT=4
- NumNodesOfType_Vcc_PREBXBY=4
- NumNodesOfType_Vcc_VCCOUT=4

SiteStatistics

- IOB-DIFFM=5
- IOB-DIFFS=2
- SLICEL-SLICEM=30

SiteSummary

- BUFGMUX=1
- BUFGMUX_GCLKMUX=1
- BUFGMUX_GCLK_BUFFER=1
- IOB=7
- IOB_INBUF=2
- IOB_OUTBUF=5
- IOB_PAD=7
- SLICEL=59
- SLICEL_C1VDD=3
- SLICEL_C2VDD=11
- SLICEL_CYMUXF=25
- SLICEL_CYMUXG=24
- SLICEL_F=56
- SLICEL_FFX=15
- SLICEL_FFY=14
- SLICEL_G=56
- SLICEL_GNDF=22
- SLICEL_GNDG=13
- SLICEL_XORF=12
- SLICEL_XORG=10

Configuration Data
BUFGMUX

- S=[S_INV:1] [S:0]

BUFGMUX_GCLKMUX

- DISABLE_ATTR=[LOW:1]
- S=[S_INV:1] [S:0]

IOB

- O1=[O1_INV:0] [O1:5]

IOB_OFF1

- CK=[CK:3] [CK_INV:0]
- D=[D:3] [D_INV:0]
- LATCH_OR_FF=[FF:3]
- OFF1_INIT_ATTR=[INIT0:3]
- OFF1_SR_ATTR=[SRLOW:3]
- OFFATTRBOX=[ASYNC:3]
- SR=[SR:0] [SR_INV:3]

IOB_OUTBUF

- IN=[IN_INV:0] [IN:5]

IOB_PAD

- DRIVEATTRBOX=[12:5]
- IOATTRBOX=[LVCMOS25:7]
- SLEW=[SLOW:5]

SLICEL

- BX=[BX_INV:0] [BX:6]
- BY=[BY:1] [BY_INV:0]
- CE=[CE:4] [CE_INV:0]
- CIN=[CIN_INV:0] [CIN:21]
- CLK=[CLK:19] [CLK_INV:0]
- SR=[SR:0] [SR_INV:18]

SLICEL_CYMUXF

- 0=[0:25] [0_INV:0]
- 1=[1_INV:0] [1:25]

SLICEL_CYMUXG

- 0=[0:24] [0_INV:0]

SLICEL_F5MUX

- S0=[S0:15] [S0_INV:0]

SLICEL_FFX

- CE=[CE:3] [CE_INV:0]
- CK=[CK:15] [CK_INV:0]
- D=[D:15] [D_INV:0]
- FFX_INIT_ATTR=[INIT0:15]
- FFX_SR_ATTR=[SRLOW:15]
- LATCH_OR_FF=[FF:15]
- SR=[SR:0] [SR_INV:15]
- SYNC_ATTR=[ASYNC:15]

SLICEL_FFY

- CE=[CE:1] [CE_INV:0]
- CK=[CK:14] [CK_INV:0]
- D=[D:14] [D_INV:0]
- FFY_INIT_ATTR=[INIT0:12] [INIT1:2]
- FFY_SR_ATTR=[SRLOW:12] [SRHIGH:2]
- LATCH_OR_FF=[FF:14]
- SR=[SR:0] [SR_INV:13]
- SYNC_ATTR=[ASYNC:14]

SLICEL_XORF

- 1=[1_INV:0] [1:12]

Pin Data
BUFGMUX

- I0=1
- O=1
- S=1

BUFGMUX_GCLKMUX

- I0=1
- OUT=1
- S=1

BUFGMUX_GCLK_BUFFER

- IN=1
- OUT=1

IOB

- I=2
- O1=5
- PAD=7

IOB_INBUF

- IN=2
- OUT=2

IOB_OFF1

- CK=3
- D=3
- Q=3
- SR=3

IOB_OUTBUF

- IN=5
- OUT=5

IOB_PAD

- PAD=7

SLICEL

- BX=6
- BY=1
- CE=4
- CIN=21
- CLK=19
- COUT=24
- F1=55
- F2=48
- F3=36
- F4=27
- G1=56
- G2=45
- G3=29
- G4=23
- SR=18
- X=26
- XB=1
- XQ=15
- Y=30
- YQ=14

SLICEL_C1VDD

- 1=3

SLICEL_C2VDD

- 1=11

SLICEL_CYMUXF

- 0=25
- 1=25
- OUT=25
- S0=25

SLICEL_CYMUXG

- 0=24
- 1=24
- OUT=24
- S0=24

SLICEL_F

- A1=55
- A2=48
- A3=36
- A4=27
- D=56

SLICEL_F5MUX

- F=15
- G=15
- OUT=15
- S0=15

SLICEL_FFX

- CE=3
- CK=15
- D=15
- Q=15
- SR=15

SLICEL_FFY

- CE=1
- CK=14
- D=14
- Q=14
- SR=13

SLICEL_G

- A1=56
- A2=45
- A3=29
- A4=23
- D=56

SLICEL_GNDF

- 0=22

SLICEL_GNDG

- 0=13

SLICEL_XORF

- 0=12
- 1=12
- O=12

SLICEL_XORG

- 0=10
- 1=10
- O=10

Tool Usage
Command Line History

- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- xst -intstyle ise -ifn <ise_file>
- xst -intstyle ise -ifn <ise_file>
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <ise_file> <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s400-pq208-4 <fname>.ngc <fname>.ngd
- map -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
- par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
- trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
- bitgen -intstyle ise -f <fname>.ut <fname>.ncd
- fuse

Software Quality
Run Statistics
Program Name | Runs Started | Runs Finished | Errors | Fatal Errors | Internal Errors | Exceptions | Core Dumps
_impact | 20 | 15 | 0 | 0 | 0 | 0 | 0
bitgen | 27 | 27 | 0 | 0 | 0 | 0 | 0
map | 28 | 26 | 0 | 0 | 0 | 0 | 0
ngdbuild | 30 | 29 | 0 | 0 | 0 | 0 | 0
par | 25 | 25 | 0 | 0 | 0 | 0 | 0
trce | 26 | 26 | 0 | 0 | 0 | 0 | 0
xst | 31 | 30 | 0 | 0 | 0 | 0 | 0

Project Statistics
PROP_Enable_Message_Filtering=false | PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced | PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false | PROP_PropSpecInProjFile=Store all values
PROP_SelectedInstanceHierarchicalPath=/bench | PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed | PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false | PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2013-12-23T19:15:56 | PROP_intWbtProjectID=020032D93A0F4E839004C8FBD211019E
PROP_intWbtProjectIteration=10 | PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No | PROP_selectedSimRootSourceNode_behav=work.bench
PROP_AutoTop=true | PROP_DevFamily=Spartan3
PROP_DevDevice=xc3s400 | PROP_DevFamilyPMName=spartan3
PROP_DevPackage=pq208 | PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-4 | PROP_PreferredLanguage=VHDL
FILE_UCF=1 | FILE_VHDL=2

Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 | NGDBUILD_NUM_FDC=23 | NGDBUILD_NUM_FDCE=3 | NGDBUILD_NUM_FDE=1
NGDBUILD_NUM_FDP=2 | NGDBUILD_NUM_GND=1 | NGDBUILD_NUM_IBUF=1 | NGDBUILD_NUM_INV=11
NGDBUILD_NUM_LUT1=8 | NGDBUILD_NUM_LUT2=24 | NGDBUILD_NUM_LUT2_L=4 | NGDBUILD_NUM_LUT3=11
NGDBUILD_NUM_LUT3_D=1 | NGDBUILD_NUM_LUT3_L=3 | NGDBUILD_NUM_LUT4=40 | NGDBUILD_NUM_LUT4_D=1
NGDBUILD_NUM_LUT4_L=9 | NGDBUILD_NUM_MUXCY=49 | NGDBUILD_NUM_OBUF=5 | NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=22
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 | NGDBUILD_NUM_FDC=23 | NGDBUILD_NUM_FDCE=3 | NGDBUILD_NUM_FDE=1
NGDBUILD_NUM_FDP=2 | NGDBUILD_NUM_GND=1 | NGDBUILD_NUM_IBUF=1 | NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_INV=11 | NGDBUILD_NUM_LUT1=8 | NGDBUILD_NUM_LUT2=24 | NGDBUILD_NUM_LUT2_L=4
NGDBUILD_NUM_LUT3=11 | NGDBUILD_NUM_LUT3_D=1 | NGDBUILD_NUM_LUT3_L=3 | NGDBUILD_NUM_LUT4=40
NGDBUILD_NUM_LUT4_D=1 | NGDBUILD_NUM_LUT4_L=9 | NGDBUILD_NUM_MUXCY=49 | NGDBUILD_NUM_OBUF=5
NGDBUILD_NUM_VCC=1 | NGDBUILD_NUM_XORCY=22

XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj | -ifmt=mixed | -ofn=<design_top> | -ofmt=NGC
-p=xc3s400-4-pq208 | -top=<design_top> | -opt_mode=Speed | -opt_level=1
-iuc=NO | -keep_hierarchy=No | -netlist_hierarchy=As_Optimized | -rtlview=Yes
-glob_opt=AllClockNets | -read_cores=YES | -write_timing_constraints=NO | -cross_clock_analysis=NO
-bus_delimiter=<> | -slice_utilization_ratio=100 | -bram_utilization_ratio=100 | -verilog2001=YES
-fsm_extract=YES | -fsm_encoding=Auto | -safe_implementation=No | -fsm_style=LUT
-ram_extract=Yes | -ram_style=Auto | -rom_extract=Yes | -shreg_extract=YES
-rom_style=Auto | -auto_bram_packing=NO | -resource_sharing=YES | -async_to_sync=NO
-mult_style=Auto | -iobuf=YES | -max_fanout=500 | -bufg=8
-register_duplication=YES | -register_balancing=No | -optimize_primitives=NO | -use_clock_enable=Yes
-use_sync_set=Yes | -use_sync_reset=Yes | -iob=Auto | -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5

ISim Statistics
Xilinx HDL Libraries Used=ieee
Fuse Resource Usage=280 ms, 24660 KB