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-- Company: 
-- Engineer: 
-- 
-- Create Date:    18:05:02 11/17/2013 
-- Design Name: 
-- Module Name:    LED_FLASH - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity SEVEN_SEGMENT is
PORT(
clk:in std_logic;
SEVEN_SEG:out std_logic_vector(7 downto 0);


K1 :out std_logic;
K2 :out std_logic;
K3 :out std_logic;
K4 :out std_logic; 


led_gnd:out std_logic
);

end SEVEN_SEGMENT;

architecture Behavioral of SEVEN_SEGMENT is
signal counter:integer range 0 to 9999;
begin





process(clk)
variable cnt:integer range 0 to 50000000:=0;
variable state:integer range 0 to 11:=0;
begin
if rising_edge(clk) then

case state is

when 0 =>
k1<='1';
k2<='0';
k3<='0';
k4<='0';
state:=2;




when 1 =>
if counter=1 then
SEVEN_SEG<="11111001";
state:=11;

elsif counter=2 then
SEVEN_SEG<="10100100";
state:=11;

elsif counter=3 then
state:=11;
SEVEN_SEG<="10110000";

elsif counter=4 then
state:=11;
SEVEN_SEG<="10011001";


elsif counter=5 then
state:=11;

SEVEN_SEG<="10010010";
elsif counter=6 then
state:=11;

SEVEN_SEG<="10000010";
elsif counter=7 then
state:=11;

SEVEN_SEG<="11111000";
elsif counter=8 then
state:=11;

SEVEN_SEG<="10000000";
elsif counter=9 then
state:=11;

SEVEN_SEG<="10011000";
else
state:=11;

counter<=0;
SEVEN_SEG<="11000000";
end if;

when 2=>
k1<='1';
k2<='0';
k3<='0';
k4<='0';
state:=3;



when 3=>
SEVEN_SEG<="11111001";

if cnt=1000 then
cnt:=0;
state:=4;

else
cnt:=cnt+1;
state:=3;

end if;


when 4=>
k1<='0';
k2<='1';
k3<='0';
k4<='0';
state:=5;



when 5=>
SEVEN_SEG<="10100100";
if cnt=1000 then
cnt:=0;
state:=6;

else
cnt:=cnt+1;
state:=5;
end if;
when 6=>
k1<='0';
k2<='0';
k3<='1';
k4<='0';
state:=7;

when 7=>
SEVEN_SEG<="10110000";
if cnt=1000 then
cnt:=0;
state:=8;
else
cnt:=cnt+1;
state:=7;
end if;

when 8=>
k1<='0';
k2<='0';
k3<='0';
k4<='1';
state:=9;

when 9=>
SEVEN_SEG<="10011001";
if cnt=1000 then
cnt:=0;
state:=10;
else
cnt:=cnt+1;
state:=9;
end if;

when 10=>
state:=2;


when 11=>
if cnt=1000000 then
cnt:=0;
state:=2;
counter<=counter+1;
else
cnt:=cnt+1;
state:=11;
end if;




end case;

end if;
end process;






















end Behavioral;





